As is known, for manufacturing microsystems comprising elements obtained using different technologies, such as microelectromechanical systems (MEMS) and integrated circuits, there exists the need to electrically connect two opposite faces (front and rear) of substrates integrating electronic components or, generally, carrying passive elements and/or protection structures and/or connection structures to other substrates.
EP-A-0 926 723 describes a process for forming front-rear through contacts in micro-integrated electronic devices. According to this process, a metal contact region extends through a through opening in the chip. In detail, this process is basically made up of the following steps:    1. Formation of metal connection regions on the front of a wafer during formation of the contacts of the device; the metal connection regions are formed at the location where the connection with the rear of the wafer will be made;    2. Etching of the rear of the wafer for partial removal of the substrate in the connection locations with formation of openings passing right through the wafer;    3. Deposition of an insulating layer on the bottom and on the walls of the through cavities;    4. Removal of the insulating layer from the bottom of the cavity to obtain contact areas with the front of the wafer and with the metal connection regions;    5. Deposition or growth from the rear of a metal layer, which coats the walls of the cavities, makes electrical contact with the metal connection regions, and has surface portions on the rear of the wafer; and    6. Formation on the rear of connection regions towards the outside in electrical contact with the surface portions.
In the process described above, the biggest difficulties lie in insulating the through openings (deposition of oxides, nitrides or polymeric materials), in that they have a depth of several tens of microns and have substantially vertical walls.
EP-A-1 151 962 describes a structure for electrical connection between two bodies of semiconductor material obtained by digging trenches of a closed (annular) shape from the front of a first, heavily doped, wafer and filling the trenches with dielectric material. Next, the first wafer is thinned from the rear until the trenches are reached, so obtaining an insulated-silicon area (silicon plug), which connects the front and the rear of the wafer. Next, the first wafer is fixed to a second wafer which houses integrated components. If MEMS are made in the first wafer, it can be used as protection for the MEMS and their connection to the second wafer.
In the above structure, the need to dope the first wafer heavily to reduce resistance of the silicon plugs limits the applicability of this solution. In particular, in the first wafer, only some types of microsystems may be integrated, and normally the integration of active components is not possible.